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MOliv45's avatar
MOliv45
Icon for New Contributor rankNew Contributor
1 year ago

How to constrain inter-clock transfers with very low default relationiship (1 ps)?

=== SHORT INTRO === Due to some questionable architecture decisions in the past, we ended up with a large circuit implemented in three related clock frequencies using timing division multiplexing. T...
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RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

Noted. Will this process take some time?


If so, I will transition this thread to community support, meaning it will not be attended by an Altera agent, as we do not want the case to idle for too long.


Rest assured, if you need further assistance, you can always file a new case, and we'll be ready to provide support promptly.

Thank you for your understanding.


Regards,

Richard Tan