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Altera_Forum
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12 years ago

How do we see the placement & routing on the FPGA chip

Hi, How can we see the actual placement and routing and/or where our design elements are placed on the FPGA using QuartusII ? I have synthesised a design on CycloneIII and want to see where the...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hello Ted,

Thanks for your reply. In the documentation of the Chip planner says we have to adjust the "Layout Settings" to view the resources. But I am unable to view the details of the logic and routing because It says - "disabled due to automatic layer disabling at the current zoom level" . [I have attached the screen shot of it] I tried changing the Layer settings to basic, detailed etc. But no luck.

Can you kindly suggest me what I need to do to zoom in to see these details?