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Honored Contributor
Honored ContributorHow do I cascade two PLLs?
Hi - In order to get a particular clock ratio, I need to cascade two plls. PLL0 has a pin input, and a single output. PLL1's input is the output of the first PLL, and has multiple outputs which go ...
Altera_ForumHonored Contributor
Honored ContributorExample:
50 MHz crystal going to PLL1 reference. PLL1 setup has c0 output fror 75 MHz, and reference frequency of 50 MHz. PLL2 setup has 75 MHz reference, and c0 output for 62.5 MHz. The in SDC: derive_pll_clocks -create_base_clocks Which generates derived clocks (2 of them) and base clocks (2 of them). But the SDC does not know the phase relationship between 50 MHz and 62.5 MHz. For that, something more needs to be told for SDC, which I don't know at the moment. -Topi
