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Honored Contributor
Honored ContributorHow Could I use DDR in CyClone III Starter kit successfully?
Hello, I try to use the DDR in Cyclone III starter kit ,But I try it a lot of times ,It is not success ,even I do not know why I cannot to use the DDR IP.When I generate the project it hints err...
Altera_ForumHonored Contributor
Honored ContributorI have compiled the DDR ,but in the last steps(EDA netlist Writer) it told me following:Error: Can't generate netlist output files because the file "E:/2008-04-01/DDR_71/auk_ddr_hp_controller.vhd" is an OpenCore Plus time-limited file
