high speed pulse generation

The 1ns resolution should be achievable using ALT_LVDS transmitter running at 1GHz. You can set LVDS TX at x 10 mode and have the parallel clock run at 100MHz. This translates to 10 parallel bits each for channel A and B. You can then use Nios to update these 20 bits with the pulse pattern and offset. Without any additional logic, the update time will be limited by the frequency Nios is running at. If you can add additional logic or SM running at 100MHz, you should be able to repeatedly generate the pulse and timing you want.