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Altera_Forum
Honored Contributor
Honored Contributorhelp to correct error in program
sir/mam, part of my program is :## m_out1 : std_logic_vector(15 downto 0);qsin_out1 :std_logic_vector(14 downto 0); x_in1,f1 : integer,# ## error : Operator <DIVIDE> must have constant operand...
Altera_ForumHonored Contributor
Honored ContributorGuess you get the error when compiling with quartus?
I think you code is a bit too fancy to be impelemented in HW directly by the Quartus software. Dividing is logic consuming in FPGA's. To infer a divider you best use a standard component of altera. Eg:ALTFP_DIV, it is a standard megafunction.
