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Altera_Forum
Honored Contributor
12 years agoProblem solved.
Some pins were wrong on Stratix V GX Project as the channel used. Pins changed/wrong: -NVMPROT was missing pin, probably a typo, since a VNMPROT was pinned from nowhere to nowhere. Pinned to PIN_F8 (HSMA_RX_D_P13); -GPIO0_1 and GPIO1_1 are swapped (PIN_C10 and PIN_D10); -SIVGX project used HSMA_(R/T)X_(P/N)[7..4] while SVGX was pinned to HSMA_(R/T)X_(P/N)[3..0]. Changed pins to SIVGX configuration. Refer to Stratix V GX Reference Manual for pinnage. Hope that this helps anyone who tries to use this project.