Help needed: large onchip memory on 3c120 board

When you instantiate any core (i.e. NiosII with cache) which uses onchip memory as a buffer or fifo, it acquires onchip memory in single/multiple M9K based on design implementation.

So lets take an example you need 1 kbits of onchip memory. Compiler will assign one full M9K block even if your usage is 1 kbits.

So memory usage you see on result may be less but how much M9K block it used is important.

I hope this has clarified your doubt.