Help: Altera Stratix || Dsp board reset

Reset? The internal logic resets, the device reconfigures, the other devices on the board go through a reset configuration?

SignalTap puts logic in the device that captures data from existing logic. It doesn't send anything out into the device that would cause a reset. Are you sure the problem, whatever it is, is really due to signaltap, or just that changing signaltap nodes causes a different fit and the problem is randomly occuring here and there? Maybe do a few compiles with different seed(Assignments -> Settings -> Fitter -> Seed) and see if the problem comes and goes away. That would at least help rule out SignalTap.