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Altera_Forum's avatar
Altera_Forum
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15 years ago

has mapped clock signal on user I/O

Hi, I am using arria II GX FPGA along with the ADC AD9268 on my board. I have two clock outputs from the FPGA which are used to latch the digitized output data from the ADC. I have mapped one o...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi Supal,

Thanks for your reply. But my question is slightly different than for what you have answered. I just need to know whether I can give a clock input on a user IO or not. As I have already given the clock on an IO in my board, can I use the clock using global routing for clock?

thanks