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Altera_Forum
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14 years ago

Hardware primitives giving odd behavior

I am a student just starting with Verilog and am trying to create a module to take all the numbers between 0 and 63 and then modulo them by three and five. I am trying to do it with a pair of ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Realized that I should just package the outputs in text files, also wanted to give the tables for the different modulos I have tried. Have done 2/3/4/5/10 now, and only 3 works.

Things I have tried as well: using only one primitive in the top level, separate inputs for the different primitives, changing the amount of time in the test bench, and re-writing the entire truth table. I get the same wrong outputs on every time regardless of what I do.