Forum Discussion
Altera_Forum
Honored Contributor
13 years agoGood way to generate /WE signal?
Hi all! Does anyone have any suggestions for generating a (negative-logic) write-enable signal for an async ram? The ram I'm (planning) to use has a 0ns data/address hold time and since I'd lik...
Altera_Forum
Honored Contributor
13 years agoUsually keeping everything as synchronous as possible will make life easier in the long run and easier to debug.
And where is this mythical memory with a 0ns hold time from?