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Altera_Forum
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13 years ago

Gigabit Transceiver Lane Assignement_5SGXA7KF35

I am using StratixV 5SGXA7KF35 for a Prototype design. In this design, x8 Gigabit Transceivers are used for FPGA to FPGA interconnection. Protocol is not yet defined. It may be any one of the followi...
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Altera_Forum
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13 years ago

i don't think you'll be able to use the PCIe HIP when you mix the lanes like this. i think XAUI may have similar problems