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Altera_Forum
Honored Contributor
13 years agoHi dave
Thanks for the advice. I worked on the code and the output i am expecting is sum on input and random noise but i am getting what ever input i give as output. Here is the code LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.NUMERIC_STD.ALL; ENTITY cumulants IS GENERIC (n : INTEGER := 32); PORT( clk : IN STD_LOGIC; x : IN STD_LOGIC_VECTOR (n-1 DOWNTO 0); y : OUT STD_LOGIC_VECTOR (n-1 DOWNTO 0) ); END ENTITY cumulants; ARCHITECTURE Behavioral of cumulants is COMPONENT random PORT( clk : IN STD_LOGIC; random_num : OUT STD_LOGIC_VECTOR (n-1 DOWNTO 0) ); END COMPONENT random; SHARED VARIABLE rand_temp1 : STD_LOGIC_VECTOR(n-1 DOWNTO 0); SIGNAL s : INTEGER; BEGIN u1 : random PORT MAP ( clk => clk, random_num => rand_temp1 ); PROCESS(clk) BEGIN IF(RISING_EDGE(clk)) THEN y <= x OR rand_temp1 ; END IF; END PROCESS; END; The code for random number is shown above any help would be appreciated Aditya