Generating a signal with noise

Hi dave thanks for the reply

PACKAGE n_bit_int IS-- User-defined type

SUBTYPE BITS32 IS INTEGER RANGE -2**32 TO 2**32-1; -- -256 ~255

SUBTYPE BITS33 IS INTEGER RANGE -2**33 TO 2**33-1; -- -512 ~511

END PACKAGE n_bit_int;

LIBRARY WORK;

USE WORK.n_bit_int.ALL;

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.NUMERIC_STD.ALL;

ENTITY cumulants IS

GENERIC (n : INTEGER := 32);

PORT( clk : IN STD_LOGIC;

x0 : IN BITS32;

x1 : IN BITS32;

x2 : IN BITS32;

x3 : IN BITS32;

y0 : OUT BITS33;

y1 : OUT BITS33;

y2 : OUT BITS33;

y3 : OUT BITS33

);

END ENTITY cumulants;

ARCHITECTURE Behavioral of cumulants is

COMPONENT random

PORT( clk : IN STD_LOGIC;

random_num : OUT STD_LOGIC_VECTOR (n-1 DOWNTO 0)

);

END COMPONENT random;

VARIABLE rand_temp : STD_LOGIC_VECTOR(n-1 DOWNTO 0);

SIGNAL s : INTEGER;

BEGIN

u1 : random PORT MAP ( clk => clk, random_num => rand_temp );

PROCESS

BEGIN

s <= CONV_INTEGER(rand_temp);

y0 <= x0 + s;

y1 <= x1 + s;

y2 <= x2 + s;

y3 <= x3 + s;

END PROCESS;

END;

I am getting an error as

Error (10482): VHDL error at cumulants.vhd(49): object "CONV_INTEGER" is used but not declared

is my deceleration of conversation bad? can you suggest me how i can improve my vhdl skills??

--:) ADI