Generate Simulation data from RAM or ROM table and acquire with Signal Tap Analyzer?

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Test benches are, usually, not synthesizable...

I assume your filter's input is a N bit vector which provides 1 sample per clock.

If you want to run the test with L samples, you need a NxL ROM with the samples (you can use a megafunction for that).

Then you need to connect the ROM's output to your filter's input and add a counter to cycle through the ROM's addresses.b

You can then use SignalTap to see the filter's output.

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For the ROM do i use the NCO megacore? and how do i add the counter to cycle the rom's addresses? i know SignalTaps trigger when a trigger condition is met. for a filter what would be considered a trigger? sorry for the seemingly basic questions, but i'm all new to this and can't seem to find these information anywhere. thank you once again.