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Altera_Forum
Honored Contributor
Honored ContributorGenerate flip-flop level RTL schematic
Hello, Quartus can generate RTL view, but using its LUT as primitive. ModelSim integrated into Quartus just don’t give RTL-like view. For learning VHDL basics, is there any configuration...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Can we get Quartus RTL views always expand thick bus lines to individual wires? --- Quote End --- In the RTL view no, but the RTL view is NOT the final implemented design. It is just your code converted to implementable hardware blocks. THe technology map view shows you each bus wire seperately and where each bit goes.
