Forum Discussion
Altera_Forum
Honored Contributor
13 years agoGeneral questions about memories, configuration and FPGA systems.
Hi, I have done some research on the forum about the topic, but i have still some questions and want to verify and sum up everything. In my questions about system configuration i will refer to ...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- What dsl was trying to convey is that the fabric will handle the conversion in less than 100% efficient manner. --- Quote End --- Hi, thanks rbugalho for the anwser, will it take for the NIOS 2 clock cycles instead of 1 to read the 32 bits from 16 bit memory, or there is something else also to the effiicency loss? best Madness