General questions about memories, configuration and FPGA systems.

Regarding the memory width question, You can use a 32, 16 or even 8 bit memory width (this applies SRAM, SDRAM or Flash). But since Nios is 32bits, it will require respectively 1, 2 or 4 memory accesses to fetch a single instruction or data. That's why a 32bit wide device is faster.

Regarding the differences between sram and sdram, you correctly remarked that sram are asynchronous, so they usually require adding wait states in order to meet the timing. This will reduce the throughput compared to sdram, especially in burst.

On the other hand sdram are slower in case of random access, because of the cumbersome access method (rows, columns, RAS, CAS, precharge ...)