Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

general questions about implementing code in memories

Hi,

i am working on Quartus 9.0, ModelSim and Nios Ide and I have questions about my work: I would like to implement a code in a memory on my development board (cyclone II and Nios II from Altera). How can I select the memory in which I can implement my code (for example on a SRAM and not a SDRAM or on a Flash memory)? Should I with SOPC Builder just had to my system the memory on which I implement my code or can I add more memories and, in a way I do not know (and I am asking now), select the memory I want?? How can I tell my computer to download the code in the memory I want?

What is more, how can I see the number of gates of logical cell used by my FPGA?

i know it is not so clear but if you have questions about mine do not hesitate to ask me for more details;

thanks

elea

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    If you're using NIOS IDE, you can select the memory where you want to place .text, .rodata, .rwdata sections by modifying the System Library properties.

    You can see the number of logical elements in the compilation report in Quartus. It's the report which pops up after you synthesize a design.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Thank you for your answer.

    i have another question: What is an EPCS device?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    What is an EPCS device?

    --- Quote End ---

    an EPCS device is a serial Flash memory. It is usually used to download your FPGA configuration to the device at startup. But of course such EPCS devices can also be used as memories...