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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

FSM problem

Heyy I'm trying to make a video game in vhdl on de0 board and I need help about the following FSM. No error or warning. Does anyone notice a mistake?? thankss. type XY_REG_TYPE is array (0 ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

It seems that the state machine is only half recognised by the FSM viewer. It can list the states but not the transitions. I'm not sure, but you may have to stick to the two-process model that Altera describes in the guidelines for the state machine to be properly recognized by the viewer.