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Altera_Forum
Honored Contributor
Honored ContributorFSM problem
Heyy I'm trying to make a video game in vhdl on de0 board and I need help about the following FSM. No error or warning. Does anyone notice a mistake?? thankss. type XY_REG_TYPE is array (0 ...
Altera_ForumHonored Contributor
Honored ContributorIt is hard to tell if there is a mistake if you do not know what this piece of code is supposed to do.
Anyway, I would suggest you something about VHDL coding style. Please, take this advice as something that comes from a guy that studied VHDL some long time ago and now uses it for its job. I mean that I may be outdated at academic coding style... Why you make use of integers as signals for synthesis? It seems that a large bus of bits travels around your design and it is used as decoder for a multiplexer. The multiplexer is implicit in the array indexing. Someone taught to me that this can lead to sub-optimal synthesis results. This teaching, as I told, may be outdated or too much conservative (for "company" compatibility with older tools that produced sub-optimal synthesis results).
