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Altera_Forum
Honored Contributor
Honored ContributorFrequency of StratixIV
Hi, I'am so sorry if there are some mistakes in english. I try to modify the frequency of StratixIV (used the PLL in SOPC builder), always, i obtained with the clock tools the same frequency ...
Altera_ForumHonored Contributor
Honored ContributorHello Aflouton,
Do you have any other sdc files that you are using in your project? If not, without including timing constraints in your project, you won't get correct timing analysis. You might try uncommenting the derive_pll_clocks line mentioned before in the pll.sdc file, which will derive the timing constraints from the pll in your SOPC project. You will also need to make sure the sdc file is included in your project(in Quartus Assignments->Settings->TimeQuest Timing Analyzer and add the timing file). -Ben
