Frequency of StratixIV

Hello Protocol Engineer,

Think you very much for your reply.

Of course in regenerated my SOPC in every change. Also the project.

in the pll.sdc there are the two line "derive_pll_clocks -create_base_clocks" but this line is comment. This is the file pll.sdc

# Uncommenting one of the following derive_pll_clocks lines# will instruct the TimeQuest Timing Analyzer to automatically# create derived clocks for all PLL outputs for all PLLs in a# Quartus design.

# If the PLL inputs are constrained elsewhere, uncomment the# next line to automatically constrain all PLL output clocks.# derive_pll_clocks

# If the PLL inputs are not constrained elsewhere, uncomment# the next line to automatically constrain all PLL input and# output clocks.# derive_pll_clocks -create_base_clocks

Thanks for your helps