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... is uninferred due to inappropriate RAM size
Please suggest how I can overcome the issue.
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Infer an appropriate RAM size :)
M9K = 9kBits, 256 x 32-bits is ok in terms of the number of bits, but you also need to check that the device you are targeting supports that particular data width. Your design files do not include a project, so I can't tell which device you are targeting. Assuming you are targeting a Cyclone IV:
http://www.altera.com/literature/hb/cyclone-iv/cyclone4-handbook.pdf p22 tells you that true dual-port mode only supports 16/18-bit data, so you need two blocks of M9K to create a 256 x 32-bit block, but you would use 512 x 36-bits of M9K, so you may as well increase the address width.
I guess the Quartus inferrence engine is not too smart ... another reason to just instantiate an altsyncram (or two) directly :)
Cheers,
Dave
Honored Contributor
