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Honored Contributor
Honored ContributorFrequency divider with clk en.
I want to make a frequency divider (50 Mhz to any value, 560khz ), I am working with a counter like a freq. divider but there is a warning in Quartus II: Warning: Found 1 node(s) in clock pat...
Altera_ForumHonored Contributor
Honored ContributorI don't get this warning when synthesizing the above code with Quartus and also don't see a reason for it. I guess, you have additional code or specific assignments causing the warning.
