Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorFrequency divider with clk en.
I want to make a frequency divider (50 Mhz to any value, 560khz ), I am working with a counter like a freq. divider but there is a warning in Quartus II: Warning: Found 1 node(s) in clock pat...
Altera_ForumHonored Contributor
Honored ContributorCould you post a code fragment of your counter. It would really help with solving your problem.
Have you considered using a PLL for your frequency divider? Rgds
