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Altera_Forum
Honored Contributor
13 years agoFPGA Multiplication Resource Utilization
Hi, I need to do 18x7 multiplication and my FPGA doesnt have the built in DSP blocks, so I am using behavioral code in the source code to do the multiplication. It is taking around 190 LUT to do ...
Altera_Forum
Honored Contributor
13 years agoThe method Kaz mentioned earlier on is how I would do it. This is the one liner that does q_srrc_sum = (q_srrc * 64) - q_srrc which is the same thing as multiplying by 63.
assign q_srrc_sum = (q_srrc << 6) - q_srrc; I expect that to be around 27 LEs and it is combinational so it shouldn't impact your latency unless you need to pipeline it.