Forum Discussion

Honored Contributor

17 years ago

format conversion

how to convert from std logic vector to integer? and how to convert from sfixed to std logic vector ?? :confused::confused::confused:

Honored Contributor

17 years ago

Loads of good info here...

(Hope its OK to post links here, if not I will delete if requested :)

Top tip....

Alwyas use the package

use ieee.numeric_std.all

for all new designs.

For integer to std_logic_vector to you need to convert to unsigned (or signed) first

signal A_slv : std_logic_vector (7 downto 0) ;

signal Unsigned_int : integer range 0 to 255 ;

Unsigned_int <= to_integer( unsigned( A_slv ));

Good luck