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Honored Contributor
Honored ContributorFixed Point VHDL Support in Quartus
I am asking how people have found the synthesis results with the new VHDL2008 package for fixed point. I have created a design that is a cascaded filter simulating a three phase RL load for a motor c...
Altera_ForumHonored Contributor
Honored ContributorDave,
That is excellent feedback. It gives me motivation to synthesize this design and others that I have thought about, and test them in the lab. For filter and controller design I think this will prove most useful. I just wish that Altera paid a little more attention to VHDL versus Verilog. Thanks. James
