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Altera_Forum
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12 years ago

First time CPLD use questions - internal pull up resistor and clocking with Max 7000S

I've designed a video game controller using Altera Max 7000s and Quartus 2 using the BDF process. 1-Was I suppose to add a clock? I only have inputs and outputs and logic gates needed in the ...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Ok I found setting on Max V CPLD for Weak Pull-up Resistor" after I customize window in pin planner.

By weak I assume that means like 4.7Kohms or something, right?

I find no such setting for Max 7000S (EPM7064SLC4410N) <--this is the CPLD I want to use as it supports 5v I/O operation.

Does Max 7000S CPLD support internal pull up resistor, or does it need to use an external pull up resistor?