Altera_ForumHonored Contributor16 years agofinal year project help needed in fir design 1. i m designing an fir filter actually what i m doing is representing the general fir equation in schematic logic using shift register in delay units, the multiplexer uses sel line common to bot...Show More
Altera_ForumHonored Contributor16 years agothank you wat u mean to say is that i just declare the same package in the main program
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