Fill Ram on FPGA by HPS

I have the DE1-SoC Board from terasic and I use Quartus II 14.1.

I have a Verilog Design on my FPGA where I use data stored in a RAM on the FPGA. Now I want this RAM to be filled by the HPS.

I wonder how to do this properly. I was able to use QSys to make a Design to get data from the hps to the fpga and light up the leds via PIO and the lightweight h2f bridge.

But I do not know what to do now to use this to solve my problem, because my data is bigger then the width of the bridge. Do I have to implement the logic to do this on my own,

or is there something Qsys privides to do this.

Thanks