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Honored Contributor
Honored ContributorExternal memory access for beginner
Hello guys,
I've been learning to use external memory interface. I want to read some data from DDR2 SDRAM (assume data is there already), store them in on-chip RAM and do some calculation, then the result will be written back to SDRAM. I'm lost after instantiating the DDR2 memory controller. I have no idea how to control the I/O signals to make it work. I also see example design that use Nios to control the whole process which makes me even more confused. Please give me some suggestions or pointer so that I can learn this topic more properly. Thanks a lot!3 Replies
Altera_ForumYou will not find a lot of training material / tutorials / examples on how to directly instantiate and interface with the external memory cores. They mostly expect you to just read the datasheet / manual for the IP core and connect the signals properly.
But, you will find lots of material on creating Qsys components and some of them will cover Avalon-MM Master interfaces. So for a beginner, I would suggest creating a new Qsys module with Avalon-MM Master port which can then be placed into a Qsys sytem with other components like on-chip memory and DDR2 controller. Just because Qsys systems commonly use a NIOS processor, you don't have to. Here are some links: http://www.altera.com/support/examples/design-entry-tools/qsys/exm-qsys-tut.html http://www.altera.com/support/examples/nios2/exm-avalon-mm.html http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial- Altera_Forum
Thanks Ted!
I shall start with getting familiar with qsys. In a tutorial about DDR3 SDRAM controller with UniPHY using qsys, I see a DMA controller is added in the qsys hierarchy. I'm not clear about this, since from other documents I see that external memory controller can be directly connected to other qsys components through avalon MM bus, then what is DMA controller for here? - Altera_Forum--- Quote Start --- Thanks Ted! I shall start with getting familiar with qsys. In a tutorial about DDR3 SDRAM controller with UniPHY using qsys, I see a DMA controller is added in the qsys hierarchy. I'm not clear about this, since from other documents I see that external memory controller can be directly connected to other qsys components through avalon MM bus, then what is DMA controller for here? --- Quote End --- Anything with an Avalon-MM Master interface can connect to the external memory. The tutorials typically show a NIOS and DMA controller simply because that is a common / desirable elements of a system. From your initial post, your system might only have 3 components in it (your new component, the on-chip memory, the memory controller).
