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Altera_Forum
Honored Contributor
13 years agoExperiments in look up, explore signals in FPGA
Hello,
There's a problem in FPGA design is It's difficult to look up signal in FPGA design. If I can see signals in simulink very easily by taking a scope and lock at it. There's problem when I want to explore signals in FPGA design. There's very few outputs, which I can connect to oscilloscope. I have to change output in code and re-compilate all design, which sometime take me 10 minuts. What do you do in these case? Is there any tool can help me?2 Replies
- Altera_Forum
Honored Contributor
The tool you want is called SignalTap II. Its a logic analyzer that uses the JTAG interface. If your board has JTAG, then you can use SignalTap II.
Cheers, Dave - Altera_Forum
Honored Contributor
--- Quote Start --- The tool you want is called SignalTap II. Its a logic analyzer that uses the JTAG interface. If your board has JTAG, then you can use SignalTap II. Cheers, Dave --- Quote End --- Thanks Dave, cleared