Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Error:I/O std LVDS on output I/O pin cannot have Termination logic option setting

Hi, I have created simple schematic design [consists of 4-bit counter and Ibufout-diff [from IP catlog]. While compilation, it`s showing error. one more issue is, i have assigned only...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

--- Quote Start ---

Hi,

Also if possible attach the project?

or Save the message/error and attach.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

--- Quote End ---

I am unable to upload the project. So please check my attachment. In Schematic design, total output pins are 4. But in Pin planner output ports are missing only clk and reset pin is available