Error with Ethernet Design

Yeah, I changed the clock and that worked. Now I got these errors:

Error: The design contains 2 blocks of type "Embedded multiplier block" but the selected device EP4CGX15BF14C8 does not support such blocks
	Info: Node name: tse_ref_design:tse_ref_design_inst|tse_ref_design_cpu:cpu|tse_ref_design_cpu_mult_cell:the_tse_ref_design_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_gkr2:auto_generated|ded_mult_e091:ded_mult1|mac_mult2. Implement the design block using soft logic by choosing the relevant option in the related megafunction
	Info: Node name: tse_ref_design:tse_ref_design_inst|tse_ref_design_cpu:cpu|tse_ref_design_cpu_mult_cell:the_tse_ref_design_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_ikr2:auto_generated|ded_mult_e091:ded_mult1|mac_mult2. Implement the design block using soft logic by choosing the relevant option in the related megafunction
Error: The design contains 2 blocks of type "Embedded multiplier output" but the selected device EP4CGX15BF14C8 does not support such blocks
	Info: Node name: tse_ref_design:tse_ref_design_inst|tse_ref_design_cpu:cpu|tse_ref_design_cpu_mult_cell:the_tse_ref_design_cpu_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_gkr2:auto_generated|ded_mult_e091:ded_mult1|mac_out3. Implement the design block using soft logic by choosing the relevant option in the related megafunction
	Info: Node name: tse_ref_design:tse_ref_design_inst|tse_ref_design_cpu:cpu|tse_ref_design_cpu_mult_cell:the_tse_ref_design_cpu_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_ikr2:auto_generated|ded_mult_e091:ded_mult1|mac_out3. Implement the design block using soft logic by choosing the relevant option in the related megafunction

I guess the original project made for Stratix IV, but I changed the device setting to Cyclone IV in Qsys and Quartus. I am not sure if it is the reason for these errors, and I don't know how to fix. :D