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Altera_Forum's avatar
Altera_Forum
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14 years ago

error while compiling in quartus 2 version 11

While compiling my code in version 11 I received this error message

Error (10568): VHDL error at mylab2.vhd(23): can't write to interface object "decode_out" of mode IN

The code looks like this

library ieee;

use ieee.std_logic_1164.all;

ENTITY mylab2 IS

PORT

(

input_select : IN STD_LOGIC;

a_in, b_in : IN STD_LOGIC_VECTOR(3 downto 0);

decode_out : STD_LOGIC_VECTOR(6 downto 0)

);

END mylab2;

ARCHITECTURE a OF mylab2 IS

BEGIN

PROCESS(input_select, a_in, b_in)

BEGIN

IF (input_select = '0')THEN

CASE a_in IS

WHEN "0000" =>

decode_out <= "1111110";

WHEN "0001" =>

decode_out <= "0110000";

WHEN "0010" =>

decode_out <= "1101101";

WHEN "0011" =>

decode_out <= "1111001";

WHEN "0100" =>

decode_out <= "0110011";

WHEN "0101" =>

decode_out <= "1011011";

WHEN "0110" =>

decode_out <= "1011111";

WHEN "0111" =>

decode_out <= "1110000";

WHEN "1000" =>

decode_out <= "1111111";

WHEN "1001" =>

decode_out <= "1111011";

WHEN "1010" =>

decode_out <= "1110111";

WHEN "1011" =>

decode_out <= "0011111";

WHEN "1100" =>

decode_out <= "1001110";

WHEN "1101" =>

decode_out <= "0111101";

WHEN "1110" =>

decode_out <= "1001111";

WHEN "1111" =>

decode_out <= "1000111";

END CASE;

ELSIF (input_select = '1') THEN

CASE b_in IS

WHEN "0000" =>

decode_out <= "1111110";

WHEN "0001" =>

decode_out <= "0110000";

WHEN "0010" =>

decode_out <= "1101101";

WHEN "0011" =>

decode_out <= "1111001";

WHEN "0100" =>

decode_out <= "0110011";

WHEN "0101" =>

decode_out <= "1011011";

WHEN "0110" =>

decode_out <= "1011111";

WHEN "0111" =>

decode_out <= "1110000";

WHEN "1000" =>

decode_out <= "1111111";

WHEN "1001" =>

decode_out <= "1111011";

WHEN "1010" =>

decode_out <= "1110111";

WHEN "1011" =>

decode_out <= "0011111";

WHEN "1100" =>

decode_out <= "1001110";

WHEN "1101" =>

decode_out <= "0111101";

WHEN "1110" =>

decode_out <= "1001111";

WHEN "1111" =>

decode_out <= "1000111";

END CASE;

ELSE

decode_out <= "0000000";

END IF;

END PROCESS;

END a;

can any one help please?

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    You're missing the port direction on the entity:

    decode_out : out STD_LOGIC_VECTOR(6 downto 0)

    Cheers,

    Dave