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Altera_Forum's avatar
Altera_Forum
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10 years ago

Error: JTAG ID code specified in JEDEC STAPL Format File does not match any valid JTA

Hi, I am using Quartus II with 9.1 version. while connecting to hard ware it is showing error like follows Error: JTAG ID code specified in JEDEC STAPL Format File does not match any valid JTA...
Altera_Forum's avatar
Altera_Forum
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10 years ago

Has this ever worked - i.e. has your hardware developed a fault? Or has this never worked?

Have you check the power on the board? Is the device powered correctly?

Are you sure you are using a programming file intended for the device you're using?

What programming hardware are you using? Have you checked that the programming signals (TDI, TCK, TMS) are getting to the device? Is the device driving anything out on TDO?

Cheers,

Alex
  • jpellet's avatar
    jpellet
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    2 years ago

    I had the same problem. It worked one first time with a 7128STC100 on 2 different PCBs.

    The hardware was beyond suspicion. Power ok, signals ok, programming file ok.

    I got the same result with Quartus on Linux and Windows. Same result with a parallel port byte blaster.

    I retested the USB byte blaster (clone) on a FPGA platform and the byte blaster was OK, even after plugging it in reverse a few times.

    I specifically dedicated the JTAG pins for ISP in order to not brick itself after programming, but it seems something may have protected the access to JTAG.

    Any hints?