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Altera_Forum
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14 years ago

Error (10533): VHDL Wait Statement error

Hi, I called in a CPRI IP from Altera Quartus II which created a testbench tb_altera_cpri. While trying to compile this testbench I encountered an error: Error (10533): VHDL Wait ...
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Altera_Forum
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14 years ago

Hi Dave,

Yes. Its line 839.

Is it anyway possible to look at the RTL viewer using this testbench?

I tried compiling with ModelSim, I faced another error saying,

"Error: Error loading design # Pausing macro execution # MACRO ./compile_vhdl.do PAUSED at line 65"