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Altera_Forum
Honored Contributor
Honored ContributorEasy memory latency demo using SRAM and SDRAM?
I'm teaching a course in computer architecture and I'm using the DE1 boards as a teaching aid. In previous semesters I focused more on gate-level design using VHDL but now I want to move to a higher ...
Altera_ForumHonored Contributor
Honored ContributorHi,
Another option is to run functional simulation of the SDRAM model + memory controller and show waveforms. There is probably no need of using complex board and software setup just to show that SDRAM has higher latency that SRAM. Thanks, Evgeni
