Easy memory latency demo using SRAM and SDRAM?

The CPU could have a data and/or instruction cache that mask access to the external memories. Try do disable those caches or to sent their size to 0.

If your matrix operations are complicated (especially floating point) it could be possible that most of the CPU time is used to perform those operations rather than access the memory, so you won't see a big difference. I think I would use another kind of algorithm, not very CPU intensive but very memory intensive, such as sorting an integer list.

The tightly coupled memory interfaces can only be used to connect to memories with no wait state (generally this only includes a direct and unique connection to an on-chip memory block).

At first I was about to suggest another kind of approach, using a DMA to read or write a memory block and show the avalon signals read back from SignalTap. I think you should be able to see the initial latency with the SDRAM, and then the fast operation once the burst mode is used.