Altera_Forum
Honored Contributor
Honored ContributorDynamic Memory Allocation
Let's say I'm instantiating an on-chip FIFO memory core in SOPC builder, and I want this to be a "array of arrays". (Does this make sense), and if so, is this feasible?
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Altera_ForumHonored Contributor
Honored ContributorThe FIFO cells are physically implemented in the FPGA RAM blocks but its cells are never addressable in a one-by-one fashion like in a RAM, you can only write to the last address and read from the first one.
Once you have physically created you RAM interface in your design, you ar free to use the ANSI C function to allocate your memory.
