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TomM's avatar
TomM
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5 years ago

Dual Configuration IP on MAX10

Hi, I have got a problem with the Dual Configuration IP on a Max 10M08DAF256I7G. I'm using Quartus Version 17.1. I write the config_sel_overwrite and config_sel at Offset 1 Read the busy signal ...
JohnT_Altera's avatar
JohnT_Altera
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5 years ago

Hi,


How about the host clock frequency that is connected to the dual configuration IP?


  • TomM's avatar
    TomM
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    you mean the clock that is connected to the clk input of the dual config IP? This is the 40 MHz clock at the output two of the internal PLL.