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Honored Contributordsp builder
hello everyone I use dspbuilder design a project. I just want use it design a subsystem. But the signalcompile create a project(including the top level). How can I use dspbuilder create a VHDL f...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- in Signal Compiler, use the Export tab to create VHDL for your project --- Quote End --- Thank you very much! I had got it. but I have a new problem. I use dspbuilder create a FIR(N=64).But I compile it in quartusII with a error,the device just have 18 dsp block. How can I solve it? If I need design a high order FIR with fpga,how can I deal with it?
