Honored ContributorHello everybody,
I would like to know which are the functions of these pins and why are some dedicated pins inside the banks of the fpga. In a hw design, is it necessary to attach the ssram/ddr data pins to the dq/dqs pins in the banks of the fpga? Many thanks.
Honored ContributorHi,
DDR memories have to use dedicated pins for data and strobes => dq/dqs. SRAM is more tolerant and you don't have to use these pins. Check "external memory interface handbook" (emi.pdf) document if you want to use DDR. The last chapter is a tutorial for DDR. You can also check altera development kit schematics (choose a kit with similar components) to understand external needs (pull up/down...).Honored ContributorHi,
I think the exact answer depends on the device family you use. But the short recommendation is: Use the "predefined" pins, otherwise Quartus might give you errors when using I/Os for DDR (even when there is no real physical reason inside the FPGA that prevents the pins from using them as DDR-I/O). Regards, Thomas
