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I am using ModelSim Altera Starter Edition vsim 6.6c Simulator 2010.08 Aug 24 2010.

I don't get the error if I 's' after using do on the generated setup_sim.do.

Assuming we get this error cleared, do you think I can still achieve what I'm trying to do, i.e. read values from text file, simulate component, and save output to another text? In your sopc_system_tb.sv file, I can see that I will have to modify the two tasks avalon_write_single and avalon_read_single to be able to do what I want, but I don't know how to do that yet and it does seem a bit complicated for a relatively simple thing to do if I was testing a code in C for example.

I was just wondering whether this is the best way for me to test a hardware module. Or perhaps everything is complicated with FPGAs... damn I should have stuck with C coding :)