Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

DMA Speed Issues

Hi all, I have a QSYS design with the basic DMA controller. I have found numerous issues with this DMA controller and have managed to work around most of the issues but stuck at one last one. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

--- Quote Start ---

Thanks Ted for your suggestion. I will try them out. How can I modify the Avalon slave to handle a burst read? Should I just trap the incrementing read address and output data from the FIFO which means my slave should have a larger address range?

Anish

--- Quote End ---

Yes, instead of having the FIFO appear as a single address location, have it appear as a range of addresses equal to your maximum supported burst, where 'read' from any location in that range just gets the next FIFO read.