Forum Discussion
Honored ContributorDivision Approximation In Fm Demodulator
i am a post-graduate student at the university of ioannina greece "physics department". my thesis subject has to do about an implement of sdr receiver and demodulation of fm signal. i already have implement the ddc part in an fpga with my i and q signals in two complement's integer format (the same format used by the adc) but i have problem with the demodulation and especially with division.i use a digital phase discriminator algorithm witch produce an output following the next equation (i*dq – qdi)/(i^2 + q^2).i can compute the numerator and the denominator but the problem is with division. i can use a divisor but the result from this division is just a quotient and a remainder, this wont give the desired output in a fixed scale capable to be processed properly by a dac.is there any possible way to implement a divisor with a fixed range quotient in regard with the remainder.in other words is it possible to produce an approximated quotient from the division of two complement format signals. with only the knowledge of the first quotient and the remainder, and if that is possible what is the form of the output?any answer guidance proposed bibliography or links will be very helpful. (http://www.fpga4fun.com/forum/viewtopic.php?t=1669&start=0&postdays=0&postorder=asc&highlight=)
23 Replies
Altera_ForumHi,
The easiest way is to have the quotient with more bits(then ignore the remainder), discard the excess bits(this is now your remainder) and check its MSB as above post.- Altera_Forum
My remainder is a singed two complement number.I use the lpm_divide megafunction and a cyclone III fpga.Do you have an idea how i round up with a remainder in that form.
edit: To give a hint a based much more on this....http://rfdesign.com/mag/604rfdf4.pdf but i don't really understand what they mean by the term automatic scaling function if you have an idea.... - Altera_Forum
Hi,
If you mean how to round up to nearest integer value then: With 2's complement of any computation result we can do rounding by looking at the remainder's MSB. If this MSB bit is 1 then add 1 to quotient else leave the quotient unchanged. This applies to both positive and negative numbers. Be careful about overflowing at this addition of 1 If rounding is not enough then you have to increase the bit resolution. edit: I am assuming your remainder is not signed which is the case in any truncation of signed values so check the format of your remainder.
