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Altera_Forum
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13 years ago

divide by two operation in vhdl

Hai, I have write vhdl code for divide by two operation. Below is the short code: SRL16_a:process(CLK) begin -- SRL16 if CLK'event and CLK='1' then ...
Altera_Forum's avatar
Altera_Forum
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13 years ago

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According to my manual calculation, the bp values are as expectable. You are doing a logical shift right, probably you want an arithmetical shift with sign extension?

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Hai FvM,

Is it the bp values are exceptable? In my manual calculation (I take one example), add_temp:108+(-25)=83. Then, bp: 83/2=41.5. From the waveform, it seems correct. But, the next values is it should be, add_temp: -25+(-25)=-50. Then, bp: -50/2=-25. And so on. Please correct me. Thank in advance